Farhana ip contributions

[Farhana-Farhana]

Added the following Verilog IPs:

1. Barrel Shifter
2. 4-bit Magnitude Comparator
3. Gray Code Converter
4. 4×4 NoC Router
5. Ping Pong Buffer
6. UART Transmitter

Each IP folder contains:

• Verilog HDL source files (.v)
• eSim/KiCad schematic and project files (.kicad_sch, .kicad_pro, .kicad_prl)
• Simulation circuit files (.cir)
• Simulation output files (.cir.out, .raw, plot data files)

The designs were implemented, simulated, and verified using eSim and Verilog HDL.