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[AMD][MI355X] DSv4 SGLang agentic: v0.5.15 image, router, HiCache + MTP #2199
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@@ -4750,3 +4750,15 @@ | |
| - "Image: lmsysorg/sglang:nightly-dev-cu13-20260709-074bb928" | ||
| - "6 topologies across 1k/1k and 8k/1k: 1P1D TP4 STP + wide-EP (DEP4 prefill / DEP16 decode) from 1P1D up to 8P1D, recipes under benchmarks/multi_node/srt-slurm-recipes/sglang/qwen3.5/gb300-fp8/" | ||
| pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2137 | ||
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| - config-keys: | ||
| - dsv4-fp4-mi355x-sglang-agentic-hicache | ||
| description: | ||
| - "Bump image to lmsysorg/sglang-rocm:v0.5.15-rocm700-mi35x-20260713" | ||
| - "Align launcher env vars and server args with fixed-seq-len sibling (dsv4 attention backend, fp8_e4m3 kv-cache, disable-radix-cache, cuda-graph-max-bs, DP-attention exports, two-batch-overlap)" | ||
| - "Add SGLang router for DP-attention configs (consistent-hashing, dp-aware, correlation-id routing)" | ||
| - "Add HiCache KV offloading support" | ||
| - "Add SGLANG_CMD array pattern with command logging and env-var dump" | ||
| - "Add capture_cache_metrics for pre/post-benchmark cache stats" | ||
| - "Sweep conc=48 across TP8 +/- DPA +/- HiCache" | ||
| pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2146 | ||
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Check warning on line 4764 in perf-changelog.yaml
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Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. 🟡 The new perf-changelog.yaml entry for Extended reasoning...What the bug isThe new pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2146But per the PR metadata, this changelog entry is being introduced by this PR, #2199. Every other entry in Why this happened (copy-paste leftover)This looks like the whole changelog block — link included — was copy-pasted from an earlier, unrelated PR (#2146) rather than authored fresh for #2199. The description bullets corroborate this: they describe things that do not match this PR's actual diff:
So the whole entry (link + several bullets) appears lifted wholesale from the earlier #2146 hicache work rather than describing this PR's actual changes. ImpactThis is a documentation/traceability field only — Step-by-step proof
How to fixChange |
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🔴 PARALLEL_ARGS is appended to at lines 95/104 (--dp/--enable-dp-attention/--enable-prefill-delayer/--enable-two-batch-overlap for DP_ATTENTION=true, and --ep-size for EP_SIZE>1), but line 119 does a plain reassignment
PARALLEL_ARGS=(--tensor-parallel-size "$TP")that wipes out everything appended earlier. As a result, every dp-attn:true / ep-size>1 row in the new sweep (all the agentic-hicache DPA/HiCache rows) launches sglang as plain TP while the router is still started with --dp-aware/consistent_hashing, expecting DP ranks that no longer exist.Extended reasoning...
The bug: In
benchmarks/single_node/agentic/dsv4_fp4_mi355x_sglang.sh,PARALLEL_ARGSis built up incrementally with+=in two places:if [ "$DP_ATTENTION" = "true" ]block:PARALLEL_ARGS+=(--dp "$TP" --enable-dp-attention --enable-prefill-delayer --enable-two-batch-overlap)if [ "${EP_SIZE:-1}" -gt 1 ]block:PARALLEL_ARGS+=(--ep-size "$EP_SIZE")Both of these run before the array is initialized. Then, unconditionally, a later line does:
PARALLEL_ARGS=(--tensor-parallel-size "$TP")This is a plain assignment, not
+=. It discards every element that was appended above and replaces the array with just--tensor-parallel-size $TP. Since this line executes after both append blocks,PARALLEL_ARGSnever contains--dp,--enable-dp-attention,--enable-prefill-delayer,--enable-two-batch-overlap, or--ep-sizeby the time it's expanded intoSGLANG_CMD("${PARALLEL_ARGS[@]}") and handed tosglang.launch_server.Why nothing catches this: the script runs under
set -euo pipefail, but appending to an unset array with+=does not error undernounset— bash implicitly creates the array on first append — so the DP/EP blocks execute silently without any indication that their output is about to be thrown away.Why this matters for this PR specifically: the diff that moved the base
PARALLEL_ARGS=(--tensor-parallel-size "$TP")initialization is new — in the pre-PR version of this file, that same line existed before the DP-attention append block, so it worked correctly. The refactor relocated thePARALLEL_ARGS=(...)init to right before theSGLANG_CMDconstruction, after the DP/EP blocks, turning a correct pattern into a silent clobber.Concrete walkthrough for one of the new sweep rows, e.g.
{ tp: 8, dp-attn: true, kv-offloading: none, conc-list: [16, 32, 48, 64] }:DP_ATTENTION=true→PARALLEL_ARGS+=(--dp 8 --enable-dp-attention --enable-prefill-delayer --enable-two-batch-overlap).PARALLEL_ARGSis now(--dp 8 --enable-dp-attention --enable-prefill-delayer --enable-two-batch-overlap).EP_SIZEis unset/1, so the EP block is skipped.USE_SGLANG_ROUTER=trueis set,SGLANG_BACKEND_PORT=$((PORT+1)), the router command is prepared.PARALLEL_ARGS=(--tensor-parallel-size "$TP")executes —PARALLEL_ARGSis now just(--tensor-parallel-size 8), and everything from step 1 is gone.SGLANG_CMDis built with"${PARALLEL_ARGS[@]}"→ the server launches as plain TP8, no DP-attention, no two-batch-overlap.USE_SGLANG_ROUTER=truestill causes the router to start with--dp-awareand--policy consistent_hashing, routing to a backend that has zero DP ranks — a topology mismatch between what the router expects and what the server actually is.Impact: every dp-attn:true row in the new
dsv4-fp4-mi355x-sglang-agentic-hicachesweep (conc 16/32/48/64 for plain DPA, and 80/96 for the HiCache+DRAM-offload rows) silently degrades to plain TP8, defeating the entire point of the DPA/HiCache sweep added by this PR, while the router/backend pairing is left inconsistent.Fix: either change the base-init line to
PARALLEL_ARGS+=(--tensor-parallel-size "$TP"), or move the base initialization above the DP-attention/EP-size append blocks (restoring the original ordering).