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rv32i-tlv-cpu
rv32i-tlv-cpu PublicFully functional 32-bit RV32I RISC-V single-cycle CPU core implemented in TL-Verilog using Makerchip
M4 2
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lock_project
lock_project PublicA 3-digit Electronic Code Lock digital design implemented in Verilog using a Finite State Machine (FSM).
Verilog
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