add tacit to iris#11
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iansseijelly wants to merge 3 commits into
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schwarz-em
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Jul 3, 2026
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This is a PD-testing-only minimal config (tiny memories, no accelerators), so you don't need to add tacit here
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perhaps adding tacit to this is also fine, the new design has some SRAMs and stuffs so would be nice to be included in a PD config?
schwarz-em
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Jul 3, 2026
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Fix shuttle commit + remove tacit from TinyIris
You can keep the compilation error fix (OffchipAddressRange) in TinyIris.scala tho
schwarz-em
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Jul 3, 2026
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| it("should run tacit always trace workload") { | ||
| implicit val p = new TinyIrisConfig(sim = true) |
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Use the normal IrisConfig for your tests
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